Defects in integrated circuits resulting from the manufacturing process can compromise both the yield and the reliability of the manufactured circuits. Many reliability defects can be detected by conducting tests at different stages of the manufacturing process. Discard of the defective article, however, then limits the overall yield which can be achieved.
Moreover, some defects cannot be reliably detected at the wafer or module test stages of the manufacturing process or, later, during temperature and voltage burn-in. These undetected defects may subsequently cause a failure of the manufactured integrated circuit either following installation or in the field. As a result, such failures in reliability will most likely be encountered by an end-user or customer.
Yet other problems arise from the extent (size) of a given defect. The larger, more severe manifestations of a defect are more likely to immediately affect a circuit element (or more than one circuit element), making it more likely that the circuit element or a group of circuit elements will fail during production (which can be detected through testing). In the presence of a less severe manifestation of the same type of defect, however, a failure of the circuit element (or group of circuit elements) may not occur until later, following the manufacturing process. This can occur in shipped product, leading to a failure in the field.
In an effort to improve the yield of the manufacturing process, steps have been taken to provide manufactured integrated circuits with "redundancy circuits" which can be used to replace failing portions of the integrated circuit which are detected during the manufacturing process. For example, upon detecting that a memory cell has failed a performance test during a given stage of the manufacturing process, steps can be taken to replace the defective cell with a redundant cell present on the integrated circuit. This allows the integrated circuit to be used, avoiding the need to reject or discard the otherwise operational circuit. Although this measure has been found to improve the yield of the manufacturing process, it has not been found to materially reduce the incidence of subsequent failures of the integrated circuit following its incorporation in a product, or later, in the field.
In recognition of this problem, steps have been taken in an effort to reduce the potential for latent defects resulting from the manufacturing process to cause a subsequent failure of the integrated circuit through the use of redundancy circuits. For example, in U.S. Pat. No. 5,410,510 (Smith et al.), steps are taken to replace memory cells which only marginally pass their reliability testing, deeming them to be defective based upon an assumption that such cells are more likely to fail at a later time. In U.S. Pat. No. 5,471,479 (McRoberts et al.), steps are taken to replace an entire row of memory upon detecting a defective cell in the row. Finally, in U.S. Pat. No. 5,446,692 (Haraguchi et al.), steps are taken to replace two adjacent rows upon the detection of a defective row.
In each case, however, the redundancy circuits are used for the purpose of replacing cells which have in some way been determined to be defective. Although this approach tends to improve reliability, it does not assist in correcting defects which cannot be detected during manufacture of the integrated circuit.
Therefore the primary object of the present invention is to improve the yield and the reliability of integrated circuits incorporating redundancy circuits, particularly including semiconductor memory circuits. Another object of the present invention is to improve the yield and the reliability of integrated circuits incorporating redundancy circuits in a process which is well suited to the manufacture of such circuits.